Generic Universal Switch Blocks

A switch block M with W terminals on each side is said to be universal if every set of nets satisfying the dimension constraint (i.e., the number of nets on each side of M is at most W ) is simultaneously routable through M [2]. In this paper, we present an algorithm to construct N -sided universal switch blocks with W terminals on each side. Each of our universal switch blocks has N2 W switches and switch-block flexibility N 1 (i.e., FS = N 1). We prove that no switch block with less than N2 W switches can be universal. Further, the decomposition property of a universal switch block provides a key insight into its layout implementation with a smaller silicon area. We also compare our universal switch blocks with others of the topology associated with Xilinx XC4000-type FPGAs. Experimental results demonstrate that our universal switch blocks improve routability at the chip level.